A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing

  • Lim, Do-Yoon
  • Lim, Sehee
  • 고동한
  • Jung, In-Jun
  • Kim, Giseok
  • 외 7명

초록

With the increase in memory density and scaling down of the DRAM process, the length of the global IO pairs (GIO and GIOB) and the offset voltage (VOS) have increased. This degrades the power consumption and sensing time (tSEN) of IO sense amplifiers (IOSAs) that sense the differential input voltage via long GIO pairs (∆VGIO). Conventional IOSAs use the self-time logic, hybrid IOSA, and GIO switches to reduce the power consumption of IOSA. However, they do not consider VOS of the IOSA, which requires a larger ∆VGIO for robust IOSA sensing operations, increasing tSEN to develop a large ∆VGIO and increasing the power consumption to pre-charge these discharged GIOpairs. To mitigate these issues, offset cancellation (OC)-IOSA has been proposed. However, since two large coupling-capacitor based OC-IOSAs transfer ∆VGIO via capacitive coupling, it suffers from input voltage attenuation, severe area overhead, and static current. This work proposes a single capacitor-based direct input transfer static current-free pre-sensing IOSA (SCFP-IOSA) to reduce VOS and power consumption with a small area and high speed. The direct input transfer scheme is adopted in SCFP IOSA, which removes input voltage attenuation and does not require large capacitors, thereby enhancing the sensing margin and relieving area overhead. In addition, a novel static current free pre-sensing, which uses RC delay exponential nature, is , proposed that not only pre-amplifies ∆VGIO to enhance VOS tolerance but also reduces power consumption by removing static current during the pre-sense (PS) operation. The simultaneous coupling down and ∆VGIO developing operation also contribute to the fast sensing operation of SCFP-IOSA. According to the measurement on the experimental chip fabricated in a 28-nm CMOS technology, SCFP-IOSA achieves three times lower σVOS of 4.42 mV, 2.9 times lower power consumption of 2.15 µW, and 1.3 times faster tSEN of 3.75 ns with 4.46 times smaller area of 10.28 µm2 compared with the state-of-the-art OC-IOSA

제목
A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing
저자
Lim, Do-YoonLim, Sehee고동한Jung, In-JunKim, GiseokHan Kim, DoHa, DonggyunPark, SunjongChae, HohyunYei, SeungjaeNa, TaehuiJung, Seong-Ook
DOI
10.1109/jssc.2025.3582998
발행일
2026-03
저널명
IEEE Journal of Solid-State Circuits
61
3
페이지
1216 ~ 1227

파일 다운로드