Detailed Information
Cited 0 time in 
Cited 0 time in 
Cited 0 time in
Metadata Downloads
A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications
Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김세건 | - |
| dc.contributor.author | Cho, Keonhee | - |
| dc.contributor.author | Baek, Kyeongrim | - |
| dc.contributor.author | Kim, Hyunjun | - |
| dc.contributor.author | Bae, Younmee | - |
| dc.contributor.author | Kim, Mijung | - |
| dc.contributor.author | Seo, Dongwook | - |
| dc.contributor.author | Baeck, Sangyeop | - |
| dc.contributor.author | Lee, Sungjae | - |
| dc.contributor.author | Jung, Seong-Ook | - |
| dc.date.accessioned | 2024-03-20T23:30:13Z | - |
| dc.date.available | 2024-03-20T23:30:13Z | - |
| dc.date.issued | 2023-06-11 | - |
| dc.identifier.uri | https://yscholarhub.yonsei.ac.kr/handle/2021.sw.yonsei/22909 | - |
| dc.title | A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications | - |
| dc.type | Conference | - |
| dc.identifier.doi | 10.23919/vlsitechnologyandcir57934.2023.10185239 | - |
| dc.citation.title | 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) | - |
| dc.citation.conferenceName | 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) | - |
| dc.citation.conferencePlace | 일본 | - |
| dc.citation.conferencePlace | Kyoto, Japan | - |
| dc.citation.conferenceDate | 2023-06-11 ~ 2023-06-16 | - |
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > 공과대학 전기전자공학부 > 공과대학 전기전자공학과 > 3. Conference Papers
Items in Scholar Hub are protected by copyright, with all rights reserved, unless otherwise indicated.