Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two Dimensional WSe2/MoTe2 Stack Channel
DC Field | Value | Language |
---|---|---|
dc.contributor.author | SAM PARK | - |
dc.contributor.author | YeonSoo Jung | - |
dc.contributor.author | HYEJIN JIN | - |
dc.contributor.author | JunKyu Park | - |
dc.contributor.author | Hyenam Jang | - |
dc.contributor.author | 이솔 | - |
dc.contributor.author | Woong Huh | - |
dc.contributor.author | 조현민 | - |
dc.contributor.author | HYUNGGON SHIN | - |
dc.contributor.author | KWANPYO KIM | - |
dc.contributor.author | Chul-ho Lee | - |
dc.contributor.author | Shinhyun Choi | - |
dc.contributor.author | SEONGIL IM | - |
dc.date.accessioned | 2021-12-01T02:40:18Z | - |
dc.date.available | 2021-12-01T02:40:18Z | - |
dc.date.issued | 2020-09 | - |
dc.identifier.issn | 1936-0851 | - |
dc.identifier.uri | https://yscholarhub.yonsei.ac.kr/handle/2021.sw.yonsei/5308 | - |
dc.description.abstract | Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe2 and MoTe2 flakes are vertically stacked on the gate dielectric, and bottom p-MoTe2 performs as a channel for hole transport. Interestingly, the WSe2/MoTe2 stack interface functions as a hole trapping site where traps behave in a nonvolatile manner, although trapping/detrapping can be controlled by gate voltage (VGS). Memory retention after high VGS pulse appears longer than 10000 s, and the Program/Erase ratio in a drain current is higher than 200. Moreover, the traps are delicately controllable even with small VGS, which indicates that a neuromorphic memory is also possible with our heterojunction stack FETs. Our stack channel FET demonstrates neuromorphic memory behavior of ∼94% recognition accuracy. | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | AMER CHEMICAL SOC | - |
dc.title | Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two Dimensional WSe2/MoTe2 Stack Channel | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1021/acsnano.0c05393 | - |
dc.identifier.scopusid | 2-s2.0-85091561478 | - |
dc.identifier.bibliographicCitation | ACS NANO, v.14, no.9, pp 12,064 - 12,071 | - |
dc.citation.title | ACS NANO | - |
dc.citation.volume | 14 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 12,064 | - |
dc.citation.endPage | 12,071 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | interface traps | - |
dc.subject.keywordAuthor | neuromorphic device | - |
dc.subject.keywordAuthor | nonvolatile memory | - |
dc.subject.keywordAuthor | stack channel FET | - |
dc.subject.keywordAuthor | WSe2/MoTe2 heterojunction | - |
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