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SRAM Write-and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Cho, Keonhee | - |
| dc.contributor.author | Cho, Keonhee | - |
| dc.date.accessioned | 2023-04-19T08:40:08Z | - |
| dc.date.available | 2023-04-19T08:40:08Z | - |
| dc.date.issued | 2021-06-16 | - |
| dc.identifier.uri | https://yscholarhub.yonsei.ac.kr/handle/2021.sw.yonsei/6538 | - |
| dc.title | SRAM Write-and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling | - |
| dc.type | Conference | - |
| dc.identifier.doi | 10.23919/VLSICircuits52068.2021.9492505 | - |
| dc.citation.title | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | - |
| dc.citation.conferenceName | Symposium on VLSI Technology and Circuits | - |
| dc.citation.conferencePlace | 일본 | - |
| dc.citation.conferenceDate | 2021-06-13 ~ 2021-06-19 | - |
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Collections - College of Engineering > 공과대학 전기전자공학부 > 공과대학 전기전자공학과 > 3. Conference Papers
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