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전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

Showing results 1 to 6 of 6

Comparative Analysis and Energy-Efficient Write Scheme of Ferroelectric FET-Based Memory Cells

Ko, Dong Han; Oh, Tae Woo; Lim, Sehee; Kim, Sekeon; Jung, Seong-Ook

ArticleIssue Date2021CitationIEEE ACCESS, v.9PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Differential Read/Write 7T SRAM With Bit-Interleaved Structure for Near-Threshold Operation

Jisang Oh; JUHYUN PARK; KEONHEE CHO; TAE WOO OH; SEONGOOK JUNG

ArticleIssue Date2021CitationIEEE Access, v.9, pp 64,105 - 64,115PublisherInstitute of Electrical and Electronics Engineers
High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops

Kim, Sekeon; Oh, Tae Woo; Lim, Sehee; Ko, Dong Han; Jung, Seong-Ook

ArticleIssue Date2021CitationIEEE ACCESS, v.9, pp 35549 - 35561PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation

Cho K.; Park J.; Oh T.W.; Jung S.-O.

ArticleIssue Date2020CitationIEEE Transactions on Circuits and Systems I: Regular Papers, v.67, no.5, pp 1551 - 1561PublisherInstitute of Electrical and Electronics Engineers Inc.
SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation

Cho, Keonhee; Park, Juhyun; Kim, Kiryong; Oh, Tae Woo; Jung, Seong-Ook

ArticleIssue Date2022CitationIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.3, pp 1567 - 1571PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased With Technology Scaling

KEONHEE CHO; HEE KYUNG CHOI; INJUN JUNG; 오지상; TAE WOO OH; KIRYONG KIM; Giseok Kim; SEONGOOK JUNG; Taemin Choi; Changsu Sim, et al.

ArticleIssue Date2022CitationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.4, pp 1,039 - 1,048PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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